[Prism54-users] Newes Kernelpackages and ppc

[Jens Maurer]

Aurelien wrote:
> On Mon, 12 Jan 2004 14:42:56 +0100
> Jens Maurer <Jens.Maurer@gmx.net> wrote:
> 
>>Potentially, we're missing an endianness conversion or somesuch.
>>
> 
> 
> As you know  I'm rewriting  some part of isl_ioctl.c and I've found some
 > bugs so far. One might be related to your problem : the cache is buggy for
 > u32 ; they can be swapped twice...

First, it would be interesting to see the debugging output anyway, to
be sure of this.

Second, it appears that that there is some confusion as to whether
the mib cache stores information in CPU or device byte order.
prism54_mib_init() seems to assume that we store in CPU byte order,
but _mgt_set_request() uses "memcpy" of the raw data (which is in
device byte order).

Looking forward to your cleanup.

Jens Maurer