[Prism54-devel] Re: [PATCH] for freemac

[Denis Vlasenko]

On Tuesday 04 October 2005 22:02, Sebastien wrote:
> > 7.patch: dmaw was dma'ing only one 32bit word.
> >         Make it consistent with dmar. Works for my hw.
> 
> This is normal, since I only want to transfer one word whose value is 
> passed as parameter for now (to easily test with NET2280 registers).
> 
> On my hardware, only the three least significant bits are actually 
> transferred (0x1000000b is where lies a NET2280 scratchpad register) :

> FreeMAC > dmar 0x1000000b 1
> rxdma complete
> 00000000: 00000000
> dma status = 0x00000005
> FreeMAC > dmaw 0x1000000b 0xffffffff
> txdma complete
> dma status:00000004
> FreeMAC > dmar 0x1000000b 1
> rxdma complete
> 00000000: 00000003
> dma status = 0x00000005
> FreeMAC > dmaw 0x1000000b 2
> txdma complete
> dma status:00000004
> FreeMAC > dmar 0x1000000b 1
> rxdma complete
> 00000000: 00000002
> dma status = 0x00000005

Hmm. PCI hw does dma writes to main memory of my PC,
but where does it write to in USB case?
To NET2280 registers?

In PCI world it works (at least for my PCI card).
Here is a freemac+7.patch:

FreeMAC > mw 0x20000 0x88888888 0x20
0002007c
FreeMAC > mr 0x20000 0x20
00020000: 88888888 88888888 88888888 88888888
00020010: 88888888 88888888 88888888 88888888
00020020: 88888888 88888888 88888888 88888888
00020030: 88888888 88888888 88888888 88888888
00020040: 88888888 88888888 88888888 88888888
00020050: 88888888 88888888 88888888 88888888
00020060: 88888888 88888888 88888888 88888888
00020070: 88888888 88888888 88888888 88888888
FreeMAC > dmaw 4 0x10
dma status:00000003
FreeMAC > dmar 0 0x20
00000000: 00000001 88888888 88888888 88888888
00000010: 88888888 f000ff54 f0007d48 f000e816
00000020: f000fea5 f000e987 f000ef6f f000ef6f
00000030: f000ef6f f000ef6f f000ef57 00700465
00000040: 0c4204cc f000f84d f000f841 007003ee
00000050: f000e739 0d1f0a3e 0070042d 02590a28
00000060: f000e7a4 0a7c002f f000fe6e 02590604
00000070: f000ff53 f000f0a4 00000522 c000829e
dma status:00000042

> > Patch 7 adds handling of dma completion events. Works for me.
> > Seems like these events must be handled by FIQ. When I tried
> > to make them trigger IRQ, they didn't.
> 
> Also applied. I'll try to see what's wrong when using IRQs - we should 

They simply did not happen for me. I saw DMA rx/tx bits set in
'enable IRQ' register, but they never appeared in 'trigger IRQ'
reg.

> be able to do that, I think. Doesn't the official firmware use IRQs 
> there?

void event_handle(unsigned events)
{
        if (events & ISL38XX_EVENT_HOST) host_interrupt_recv();
        if (events & ISL38XX_EVENT_TXDMA) {
                event_disable(ISL38XX_EVENT_TXDMA, 1);
                uartpci_sendstr_nonblock("txdma complete\r\n");
        }
        if (events & ISL38XX_EVENT_RXDMA) {
                event_disable(ISL38XX_EVENT_RXDMA, 1);
                uartpci_sendstr_nonblock("rxdma complete\r\n");
        }
}

Maybe my code is suboptimal. Maybe better is to permanently enable
DMA events and do
	REG38XX_TXDMA_CONTROL = ISL38XX_DMA_CONTROL_DISABLE;
instead of
	event_disable(ISL38XX_EVENT_TXDMA, 1);
in the above code.
--
vda