[Prism54-devel] control/status bits and interrupt bits

[Bill Parsons]

Hi Rafiq, thanks for the information.


> After the card is initialized and functioning fine,
> if the Interrupt Id 
> Register contains 0x00004000 (ie 14th bit is ON)
> it means PCI fatal error occured. Once this happens
> the card goes back 
> to reset state and only way to recover is
> to restart the initialization process all over
> again.
> As far as I know this interrupt bit (0x00004000) is
> undocumented.

It is very strange that you say that because actually
I find that that bit is on 100% of time, even when the
card is working fine.


Actually, for the control/status register bits, I
stupidly cut and pasted them out of an old version of
the header file. I found this information in the
latest version:

/* Control/Status register bits */
/* Looks like there are other meaningful bits
    0x20004400 seen in normal operation,
    0x200044db at 'timeout waiting for mgmt response'
*/

So it looks like someone saw my problem before and
identified it as a timeout while waiting for a
management response. I have modified the management
code slightly, so maybe I did something wrong.

I am trying to debug it, but now I am confused. My
understanding is that the driver initiates all
management transactions, however this flag is set by
the firmware. Why would the firmware be waiting for a
management response? It should be sending the
management response.

Also, does anyone know what the length of this timeout
is or whether it is configurable?

Sorry if I am asking a stupid question. I am not an
expert at writing device drivers (yet), but I am
trying to learn.

Bill



> 
> The possible reasons for the card to issue this
> interrupt could be:
> 1)The card is trying to access an illegal address in
> host memory and as 
> a result host PCI  issues Abort to the card.
> 2)The host PCI is not responding to the incoming PCI
> read/write requests 
> from the card for an extended period of
>     time as a result card will give-up and issue
> this interrupt.
> 
> I hope this helps.
> 
> Regards,
> -Rafiq.
> 
> 
> Bill Parsons wrote:
> 
> >Has anyone figured out the meaning of the extended
> >control/status bits and interrupt mask bits in the
> >memory mapped registers?
> >
> >The driver only mentions these ones in the source
> >code:
> >
> >// Control/Status register bits
> >#define ISL38XX_CTRL_STAT_SLEEPMODE            
> >0x00000200
> >#define	ISL38XX_CTRL_STAT_CLKRUN				0x00800000
> >#define ISL38XX_CTRL_STAT_RESET                
> >0x10000000
> >#define ISL38XX_CTRL_STAT_RAMBOOT              
> >0x20000000
> >#define ISL38XX_CTRL_STAT_STARTHALTED          
> >0x40000000
> >#define ISL38XX_CTRL_STAT_HOST_OVERRIDE        
> >0x80000000
> >
> >Under normal conditions, my Prism Duette (in AP
> mode)
> >seems to show 20004400 in the status register, but
> >sometimes it hangs while I am doing a large
> download.
> >When that happens, the status register always reads
> as
> >200044DB.
> >
> >
> >The driver also lists the following interrupt
> sources:
> >
> >#define ISL38XX_INT_IDENT_UPDATE               
> 0x0002
> >#define ISL38XX_INT_IDENT_INIT                 
> 0x0004
> >#define ISL38XX_INT_IDENT_WAKEUP               
> 0x0008
> >#define ISL38XX_INT_IDENT_SLEEP                
> 0x0010
> >#define ISL38XX_INT_SOURCES                    
> 0x001E
> >
> >However, when I read the interrupt identity
> register,
> >I see that it normally reads 80004000.
> >
> >Does anyone here know what these extended bits
> mean?
> >Are they the same for every firmware version?
> >
> >Thanks in advance,
> >Bill
> >
> >
> >		
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> >
> >
> >  
> >
> 
> 






		
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