[Prism54-devel] control/status bits and interrupt bits

[Bill Parsons]

Has anyone figured out the meaning of the extended
control/status bits and interrupt mask bits in the
memory mapped registers?

The driver only mentions these ones in the source
code:

// Control/Status register bits
#define ISL38XX_CTRL_STAT_SLEEPMODE            
0x00000200
#define	ISL38XX_CTRL_STAT_CLKRUN				0x00800000
#define ISL38XX_CTRL_STAT_RESET                
0x10000000
#define ISL38XX_CTRL_STAT_RAMBOOT              
0x20000000
#define ISL38XX_CTRL_STAT_STARTHALTED          
0x40000000
#define ISL38XX_CTRL_STAT_HOST_OVERRIDE        
0x80000000

Under normal conditions, my Prism Duette (in AP mode)
seems to show 20004400 in the status register, but
sometimes it hangs while I am doing a large download.
When that happens, the status register always reads as
200044DB.


The driver also lists the following interrupt sources:

#define ISL38XX_INT_IDENT_UPDATE                0x0002
#define ISL38XX_INT_IDENT_INIT                  0x0004
#define ISL38XX_INT_IDENT_WAKEUP                0x0008
#define ISL38XX_INT_IDENT_SLEEP                 0x0010
#define ISL38XX_INT_SOURCES                     0x001E

However, when I read the interrupt identity register,
I see that it normally reads 80004000.

Does anyone here know what these extended bits mean?
Are they the same for every firmware version?

Thanks in advance,
Bill


		
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